Before we start: sorry for my English.
The goal of this tutorial is to show you how to start work with MIPI interface using new Xilinx products: SP701 evaluation board and VITIS+Vivado software tools. All that you need is describing below.
MIPI interface now is very popular and started from 1st release of VITIS and VIvado 2019.2 Xilinx provides for us an example project, which we can generate form IP Integrator. Example projects could be generated for two evaluation boards: ZCU102 and SP701. We will do this for the last.
Note: due to my not perfect English knowledge I will provide a lot of pictures instead describes the process by words.
For this tutorial, you will need a Vivado 2019.2 and VITIS SDK software tools, which you can download from here. VITIS contains Vivado, so you do not need to download both Vivado and VITIS. Download and install VITIS only. Vivado will be installed automatically.
- Run Vivado 2019.2
- Press "Create project" (1) :: press "Next" (2)
- Specify "Project name" (1) :: Specify projects directory (2) :: Set checkbox (3) :: Press "Next" (4)
- Select project type (1) :: Set checkbox (2) :: Press "Next" (3)
- Select "Boards" tab (1) :: Find and choose SP701 (2) :: Press "Next" (3)
- Press "Finish" (1)
Due we work with license required IPs, we need to generate and connect licenses for this IP. For MIPI CSI-Rx and DSI-Tx Xilinx provide 120 days of evaluation. Both these licenses require to generate an example project.
- Get a license for CSI-Rx (camera side IP). Go to the IP core page and press "Evaluate IP". Follow to instructions
- Get a license for DSI-Tx (panel side IP). Go to the IP core page and press "Evaluate IP". Follow to instructions and download license file and download license file
- In Vivado select "Help" (1) :: "Manage Licence" (2)
- In license manager select "Load licence" (1) :: Then "Copy licence" (2). Select ".lic" licenses files for CSI and DSI IP cores
- In license manager select "View License Status" (1) :: make sure that licenses installed correctly (2)
- In Vivado press "Create block design" (1) :: press "OK" (2)
- At IPI canvas press "+" or "ctrl+I" (1) :: Type "mipi" at "Search" field (2) :: Double click on "MIPI CSI-2 Rx Subsystem" IP core (3)
- Right click on IP (1) :: Select "Customize Block" (2)
- Open "Application Example Design" tab (1) :: Select "SP701" (2) :: Press "OK" (3)
- Right click on IP (1) :: Select "Open Example Design" (2)
- Press "OK" to save block design changes
- Specify the directory for example project (NOTE: the path on Windows must be as shorter as possible) (1) :: Set checkbox (2) :: Press "OK" (3) :: Press "OK" (4)
- The example project will be opened at the new Vivado window. Wait a few minutes to complete building the project
- At example project Vivado press "Generate bitstream" (1) :: Press "Yes" (2)
- Select preferred number of simultaneously generated IPs (1) :: Press "OK"
- Waiting while bitsream generation have been complete
- Connect PCAM-5C camera to MIPI CSI on SP701 board. Connect HDMI Monitor or MIPI Display to SP701. Connect a uUSB cable to SP701.
- Power On the SP701 board
- Open terminal application (Terra Term in my case). Due there are 3 COM ports recognized, I opened 3 separate Tera Term terminals sessions. The uart speed is 9600 no parity (look at uartlite module in Vivado block design)
- Open VITIS software from Vivado. Press "Tools" (1) :: Press "Launch VITIS" (2)
- Specify workspace. It locates at example project directory ("mipi_ex" in my case) :: mipi_csi2_rx_subsystem_0_ex :: SW :: xmipi_app (1) :: Press "Launch" (2)
- Close VITIS "Welcome" tab
- Now you will see the software part of the project. Code for MicroBlaze soft-processor. Please, study the code if you wish
- Press arrow near the bug (1) :: Press "Debug Configurations" (2)
- Double click at "Single Application Debug (GDB)" (1) :: Select "Debugger Executable" (2) :: Specify bitsream.bit file, generated by Vivado (3) :: Set check box (4) :: Press "Debug" 5
- Press run button and follow to the message on Tera Term terminal
- That's All (Note: do not forget to remove the protective cap from the camera ;)
As you see this is very simple to generate an example project from Vivado for MIPI interface placed on SP701 board. Almost ALL IP cores, powered by Xilinx have an example design.
Best regards, Michael.