Learn how to make FPGA AI accelerator using AXI CDMA on Arty Z7-20.
Transferring data to/from the Zynq's FPGA is an essential ingredient for integrating custom accelerators.
I have developed a fully hardwired Space Invaders written in BSV using the Ultra96 FPGA board.
Digilent Dual HDMI Input FMC module is one of the excellent solutions when you need more than one HDMI input interface in your FPGA designs
In this project, we will be exploring the open-source, FPGA-friendly VexRiscV CPU Core and test it using Coremark on the Nexys A7.
This project walks through how to create an embedded Linux image for the Arty-Z7 using PetaLinux 2022.1
This project walks through no-OS development from hardware through to C code on the Zynq-based Arty-Z7 FPGA development board.
This project details how to develop an embedded Linux image for a MicroBlaze design on the Arty A7 in PetaLinux.
This project walks details the hardware design in Vivado required to run an embedded Linux image on the Arty A7.
Using the Zybo Z7, I demonstrate how to access MMIO devices in Genode and howto switch bitstreams at run time.
Using the Zybo Z7, I demonstrate how to access GPIO in Genode and how to load a custom bitstream at boot time.
Generate a sound described by Fourier Analysis coefficients. FPGA gives a possibility of generating complex sounds in real time.
See how to use the Zmod AWG DAC converter with the Eclypse Z7 FPGA board using Vivado 2021.2.
This project demonstrates how to drive an N20 micro-gear motor with encoder using a Digilent HB3 motor controller PMOD with the Kria KR260.
AXI-Lite registers bank. Can be monitored/changed via TCL commands. Also monitored through a seven-segment display + onboard switches.
In this project we are going to implement an IIR filter in an FPGA from scratch using bilinear transform and the prewarping technique.
The goal is to offload basic I/O processing to a FPGA and read/write the results via SPI from Raspberry PI Zero
In this project we are going to connect and configure a PCIe WWAN modem to a Zynq MPSOC using Petalinux and the Genesys ZU 5EV board.
Using XDMA PCIE with DDR MEMORY in Vivado
Do you want to realize a co-simulation on System Generator using NexysA7? Oops! Nexys A7 is not available 🤭 Let's add it ❤️
Learn how to build a speech controlled robot with Tensil, Digilent Arty A7 FPGA board and Pololu Romi chassis.
Learn how to build a speech controlled robot with Tensil and Digilent Arty A7 FPGA board
A tutorial how to port Eclypse-Z7 to PYNQ, some IP synthesis and led blinking.
Pynq is a handy tool for rapid prototyping of your IP designs done in Vitis HLS, so this project is a quick demo of that cycle.