Learn how to build a speech controlled robot with Tensil and Digilent Arty A7 FPGA board

Pynq is a handy tool for rapid prototyping of your IP designs done in Vitis HLS, so this project is a quick demo of that cycle.

Text to speech device that can help people with low vision to read

See how to script a series of test measurements for automated testing on the ADP3450.

Show how to use Tensil’s open-source accelerator and Xilinx PYNQ to run ResNet-20 model on PYNQ Z1 development board.

Creating A simple Project Using Cmod S7 FPGA WIth Vivado

Using the ADP3450, this project measures amount of delay between asserting FPGA IO on base of NPN 2N3094 and LED illuminating on collector.

This project demonstrates how to take a custom RTL module and add an AXI4-Lite interface wrapper to it for use in the Vivado block design.

As a fun start to 2022, I pulled out the HP vintage bubble displays I bought on eBay with a simple Verilog controller module on the Arty Z7.

Logic analyzers can be costly, Enxor seeks to provide an open-source design to turn a FPGA into a tool for reading in/external signals.

This is a project designed to teach Digital Logics Design containing hardware setup instructions, lab deliverables, and example designs

This project walks through the build of an embedded Linux image for the Kria KV260 Vision AI starter kit using PetaLinux 2021.2

This project walks through how to integrate the required u-boot environment variables for the Zynqberry boards into a PetaLinux project.

This project walks through how to generate an embedded Linux image with the Yocto-based PetaLinux tools from Xilinx for the ZynqberryZero.

This project walks through how to create a Linux image with a desktop environment outputting on to the DIsplayPort of the TE0802.

This project walks through how to install an Ubuntu Linux distribution on the TE0802 MPSoC FPGA development board.

This project aims to implement the Support Vector Machine (SVM) on a Zynq 7000 or Zynq-MPSoC board.

The goal of this blog is to create a Vitis 2021.1 hardware accelerator platform for the Zybo-Z7-20 board from Digilent.

This project walks through how to create a base Linux image for the TE0802 Zynq UltraScale+ MPSoC development board.

A guide for getting a TE0802 Zynq UltraScale+ MPSoC development board up and running with Vivado/Vitis 2019.2.

This tutorial walks through an application that reads/writes data to DDR memory from the Linux userspace on the Zynq-based Arty Z7 FPGA.

Ultra96v2 playing the Google Chrome Dino Game with no human interaction. Just web camera, servo and image processing.

Creating custom applications is pretty straightforward in PetaLinux, but to debug them, Vitis comes into play.

See how to build a base hardware image for the Arty Z7 FPGA development board in Vivado 2020.2