Transferring data to/from the Zynq's FPGA is an essential ingredient for integrating custom accelerators.

Using the Zybo Z7, I demonstrate how to access MMIO devices in Genode and howto switch bitstreams at run time.

Using the Zybo Z7, I demonstrate how to access GPIO in Genode and how to load a custom bitstream at boot time.

The goal of this blog is to create a Vitis 2021.1 hardware accelerator platform for the Zybo-Z7-20 board from Digilent.

Most image sensors' datasheets are not public. Join me in attempting to use a RPi (v2.1)camera with FPGA without looking at its datasheet.

This project aims to implement the Support Vector Machine (SVM) on a Zynq 7000 or Zynq-MPSoC board.

In the second part of the tutorial, we learn how to read audio files from an SD card and output them on a speaker.

Moving data from traffic generator peripheral to DDR memory of Zybo Z7-10 using register mode DMA transactions

See how to create a simple traffic generator peripheral with a slave AXI4-Lite interface and a master AXI-4 streaming interface

Develop a system that can run applications that are usually run on powerful machines, on much slower and cheaper ones.

This is reference tutorial on implementing different features of Video Mixer, mainly alpha blending and logo layer and multiple TPG layers.

Let´s take a look into the I2S specification and let us try to realize the first step to play audio files with an FPGA.

Infrared image processing extending the Pcam 5C demo.

A smart glove that translates sign language letters into written letters with monitor.

The aim of this project is to process LiDAR and camera data on Zybo Z7-20 to detect objects with usage of data fusion.

GigE Vision camera bridge prototype using the Zybo Z7-10 board with a Digilent Pcam 5C camera connected to it.

TCP controlled camera keeps tracked object in center of video.

AES CryptoCores is a dedicated hardware module which helps for encryption and decryption of data using the desired key.

Easy to use Platform to learn VHDL. Running on a ZYBO over the web.

This project aims to create transmission line between two links using FPGA cards and solve the synchronization problems with ADPLL.

An assistant for visually impaired people. The user will be notified when he is getting too close to a dangerous object.

Find the location of a device, using multiple DWM1000-ESP8266 pairs, and an FPGA.

Leveraging HLS functions to create a image processing solution which implements edge detection (Sobel) in programmable logic.

Building on the Zybo Z7 image processing application. This project demonstrates using HLS with C/C++ to accelerate image processing.