SPI Interface code for Pmod ALS (8-bit ADC) in Verilog is implemented from scratch,and transmitted to 7-seg display on Basys3 FPGA board.
This simple project uses Xilinx Vitis 2020.1 to run an up/down BCD counter on Basys-3 board.
This project implements a digital dice roller on Basys3 board using HLS.
This mini-project shows how to display a floating-point number on 7-segments using C/C++ HLS.
Using an example, this project demonstrates the impact of the combinational circuit design in HLS.
This project demonstrates the capability of high-level synthesis in describing digital systems by implementing a 0-9 Up/Down counter.
In this project I'll show you how to implement a BCD decoder on the BASYS 3 using the switches and the 7 segments display on the board.