Let's learn everything about SRAM memories writing a controller in Verilog.
Let's write an efficient SRAM controller in Verilog.
FPGA-based real-time fractal generation. Fully pipelined, dynamic resource allocation, up to 18000 MMUL/s. Float matrix math on J1B CPU.
Here we demonstrate how to build fundamental CanSat electronics using a Cmod A7 FPGA board.
Implement a 4-channel TDC on Cmod A7 35 using MicroBlaze and SRAM with 30ps rms and measurement rate of 60MSa/s
Monitoring digital circuits can be difficult at best. Sometimes it's nigh impossible. But the Digital Discovery makes it easier!
This project consists of making a logical analyzer, which can help us analyze digital hardware and software analysis.
Logic Analyzer is a project which can help students and engineers to verify digital hardware, digital communication or software integration.