The goal of this blog is to create a Vitis 2021.1 hardware accelerator platform for the Zybo-Z7-20 board from Digilent.
This project aims to implement the Support Vector Machine (SVM) on a Zynq 7000 or Zynq-MPSoC board.
Moving data from traffic generator peripheral to DDR memory of Zybo Z7-10 using register mode DMA transactions
This is reference tutorial on implementing different features of Video Mixer, mainly alpha blending and logo layer and multiple TPG layers.
Leveraging HLS functions to create a image processing solution which implements edge detection (Sobel) in programmable logic.
Building on the Zybo Z7 image processing application. This project demonstrates using HLS with C/C++ to accelerate image processing.