In this project a 32ord FIR filter is computed by C application from PetaLinux. Input and output filter signals are synthesized by ZMOD DAC.
Zynq US+ is an heterogeneous device with different kind of devices inside. On this project I will show you how to use all of them together.
In this project we are going to implement an IIR filter in an FPGA from scratch using bilinear transform and the prewarping technique.
Using Eclypse Z7 to generate an FSK signal and Genesys ZU for implement a single tone detector algorithm executed in the RTU.