This project walks through how to create an embedded Linux image for the Arty-Z7 using PetaLinux 2022.1
This project walks through no-OS development from hardware through to C code on the Zynq-based Arty-Z7 FPGA development board.
Using the Zybo Z7, I demonstrate how to access GPIO in Genode and how to load a custom bitstream at boot time.
See how to use the Zmod AWG DAC converter with the Eclypse Z7 FPGA board using Vivado 2021.2.
Do you want to realize a co-simulation on System Generator using NexysA7? Oops! Nexys A7 is not available 🤭 Let's add it ❤️
This project walks through basic RF testing for hardware/software verification of SDRs on the Ettus B205mini USRP.
This project will go trough the process of acquiring an input signal through the Zmod ADC and re-creating the signal through the Zmod DAC.
This mini-project shows how to display a floating-point number on 7-segments using C/C++ HLS.
In this project I'll show you how to implement a BCD decoder on the BASYS 3 using the switches and the 7 segments display on the board.
In this project I will show you how to create a custom AXI IP on Vitis, and the driver to manage it from Bare-Metal and Petalinux.
This project proposes the creation of a graphics library in order to generate and manipulate the graphic information only using VHDL.