This project walks through how to create an embedded Linux image for the Arty-Z7 using PetaLinux 2022.1
This project walks through no-OS development from hardware through to C code on the Zynq-based Arty-Z7 FPGA development board.
Using the ADP3450, this project measures amount of delay between asserting FPGA IO on base of NPN 2N3094 and LED illuminating on collector.
See how to build a base hardware image for the Arty Z7 FPGA development board in Vivado 2020.2
This project walks through how to implement a simple FIR filter with pre-generated coefficients in Verilog.