This project aims to display the output of a light sensor on a seven-segment display in HLS. If you are interested in learning HLS to design such systems, please refer to here.
As shown in the following figure, the whole system consists of four parts: a light sensor, a push button, a four-digit seven-segment display and the logic controller. I am using the PmodALS from Digilent as the light-sensor and the Basys 3 FPGA board. The PmodALS module communicates with the FPGA over the SPI interface.
The PmodALS from Digilent utilises an ambient light sensor and converts light to an 8-bit binary value.
The value of zero indicates the lowest detected light level, and the high light level is denoted by 255.
The PmodALS uses the SPI protocol to communicate with the host board.
As shown in the following figure, the controller circuit consists of a few HLS-IPs grouped in 4 sections:
- The push-button driver debounces the push-button output and generates a single-cycle pulse.
- Pulse generator that indicates the rising and falling edges of the SPI clock
- The SPI protocol driver
- The seven-segment driver
The SPI driver, as the heart of the system, implements the following state machine.
Firstly, the controller is in the idle state, waiting to receive the start signal. Then it goes to the start state, ready for generating the SPI signals. Then it goes to the sample state by put zero on SCK to generate the falling edge on the clock. After that, it generates the SPI clock rising edge, reads one bit of the data and goes to the read state. The controller oscillates between the sample and read states 15 times, as the PmodALS require 16 clock cycles to provide the data. The read data consists of three leading zeros, 8-bit data (MSB first) and four trailing zeros.
You can find all the IPs and the constraint file here.
If you are interested in learning HLS to design such systems, please refer to here.Demo