Markus Nentwig
Published © MIT

FPGA-Fractals 1920x1080x60 Real-Time on USB Power

FPGA-based real-time fractal generation. Fully pipelined, dynamic resource allocation, up to 18000 MMUL/s. Float matrix math on J1B CPU.

IntermediateFull instructions provided1 hour507
FPGA-Fractals 1920x1080x60 Real-Time on USB Power

Things used in this project

Hardware components

Cmod A7
Digilent Cmod A7
×1
Jumper wires (generic)
Jumper wires (generic)
×1

Software apps and online services

Vivado Design Suite
Xilinx Vivado Design Suite

Story

Read more

Code

Github repo

Top level repo including the fractals project and the custom compiler for the microcontroller code

Credits

Markus Nentwig

Markus Nentwig

1 project • 0 followers
RF, DSP, envelope tracking, transceiver architecture, radio systems, production & char testing for the wireless industry
Thanks to James Bowman.

Comments

Add projectSign up / Login