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When working with embedded systems such as the Zynq, which combines high performance ARM cores with programmable logic, often we need to debug the application. This requires the ability to examine transaction on communication buses, monitor General Purpose IO and in some cases, stimulate the unit we are debugging with an external stimulus. For digital systems, it is common to use logic analyzers to observe and pattern generators to stimulate; but these functions can be combined when using tools like the Digilent Digital Discovery.
If we are working with devices like the Zynq, we can of course use internal logic analyzers (ILA) to probe design elements within the programmable logic. However, while very useful, internal logic analyzers can present some challenges these include:
- Inserting or modifying an ILA requires a recompilation of the design
- The recompilation of the design changes the design, potentially masking issues or introducing new issues
- ILAs store the captured data in internal memory. If the design uses significant internal memory resources there is limited ILA support available.
Of course, if we are debugging interfaces that use the Zynq’s Multiplexed IO (MIO) connected to the processor system, or using a traditional processor, then ILAs are not available.
In this example, we are going to use a Digital Discovery to debug a thermal imaging application based on the Arty Z7 connected to a FLIR Lepton. This example uses high-speed video HDMI, Serial Peripheral Interfaces (SPI), and Inter Integrated Circuit (I2C).
Before we examine the High-Speed Video Output, we first need to examine the low speed I2C and SPI protocols. The FLIR Lepton uses I2C for control and SPI for video output; as such, we will be able to ensure the device is operating correctly using these interfaces. Monitoring the I2C will allow us to see the correct configuration and responses of the FLIR Lepton, while monitoring the SPI provides insight into whether the video is generated properly or not.
With the Digital Discovery, we can decode UART, SPI and I2C protocols using connections 24 through 39. While the high-speed connections 0 to 24 will be used for checking the high-speed video output.
To examine the SPI and I2C commands, we first need to open WaveForms 2015 on our development computer. With the Digital Discovery connected, we can select the desired operation within the workspace. In this case we will be selecting the Protocol Option, which enables us to monitor communications on a bus and simulate masters or slaves if necessary for debugging.
To be able to examine the I2C and SPI interfaces between the Lepton and the Zynq, the Lepton has been placed on a breakout board with connectors between the Arty Z7 and the breakout board. This could affect signal integrity, however, both the I2C bus at 100 KHz and the SPI bus at 3.125 MHz have acceptable rise/fall times to prevent this from becoming an issue.
As mentioned previously, the I2C bus is used to configure the FLIR Lepton with commands issued under the control of the SW running on the ARM cores of the Zynq. This interface is used to check if it has powered correctly before commanding the Automatic Gain Control (AGC) on. The AGC changes the output from 12 bits to 8 bit, but adapts the scene to use the best scaling depending upon the temperatures in the image, providing a better overall result.
Observing the I2C transactions we can see the following interaction taking place:
- Write Address 2A register 0x02 – responds with FLIR Status
- Write Address 2A registers 0x08, 0x0A, 0x04 with values to enable AGC
- Write Address 2A register 0x02 – responds with FLIR Status
Verifying these transactions against the FLIR Lepton data sheet indicates that the commands issued by the Zynq and the response by the Lepton are as expected.
The video from the FLIR Lepton is output over SPI, referred to as VoSPI. As the video is output only, only three of the four SPI signals are used, including: Select, Clock and Master In Slave Out. As the control of the FLIR Lepton is provided via I2C, the Master Out Slave in connection is not used.
Video is output from the FLIR Lepton in blocks of 160 bytes, which represent one line. Appended to the beginning of each line is the line ID, which identifies the line count, and a CRC taking the total number of bytes to 164.
Connecting the Digital Discovery’s inputs 24, 25 and 26 to monitor the SPI lines, it is easy to monitor the video output. To be able to monitor the generated video, we need to set the SPI select active level, Clock Polarity and Clock Phase correctly. In this application, the Chip Select is active low, while the clock polarity and phase are 1.
Within WaveForms 2015, we also need to set DQ0 and DQ1. In this application, DQ0 is MOSI while DQ1 is the MISO channel and contains the data we wish to observe.
When receiving data, you will see data being captured from the FLIR Lepton. This data is generated in blocks of data, where each block starts with the line number and then CRC. In this manner, we can see the incremental nature of the frames output.
Examining the video stream generated by the FLIR Lepton, we can see the FLIR Lepton is correctly generating video. What remains now is to ensure the video output to a display over HDMI is functioning correctly.
The final image is output over an HDMI interface from the Arty Z7 to an HDMI display. HDMI transmission consists of three differential data channels and a differential clock. These signals use the TMDS standard, which stands for Transition-Minimalized Differential Signalling.
To monitor these channels, we are going to use the high-speed connector, connected to channels 0 through 23. We will also need an HDMI breakout block, which connects to the end of the HDMI cable, allowing us to access the video signals.
When we use the High-Speed Adapter, each of the signals has a corresponding ground pin to ensure the best signal integrity. With the High-Speed Adapter for the Digital Discovery, we can sample signals at up to 800 mega samples per second (MS/s) using 8 bits. As we only need four signals for the Data and Clock, this is exactly what we are going to do.
When the HDMI breakout connector was connected to the HDMI output cable, and then to the Digital Discovery, the HDMI transmission can be captured. Examining the data shows the Clock and the HDMI data channels as seen below.
Note: To capture the HDMI video, I had to change the IO standard in the XCF file to a single ended standard to ensure the signals were within the acceptable input range for the Digital Discovery.
Embedded Imaging systems might be considered complex to get up and running with multiple interfaces of varying complexity and frequency. However, when using tools such as the Digital Discovery, we can examine and verify the transactions taking place on low-speed command and control buses, along with the high-speed interfaces used to display the images as demonstrated in this example.
 The HDMI Breakout was sourced from https://www.canford.co.uk/Products/44-116_IKON-HDMI-ST-HDMI-Screw-terminal-breakout-adapter