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Python is one of the hottest programming languages at the moment, it stands to reason we would like to be able to leverage the productivity bonus which comes with using Python in our FPGA / SoC developments.
The Xilinx Pynq framework allows developers to do just that and to leverage the acceleration capabilities of programmable logic using Python. Without experience as an FPGA developer.
Using the Pynq framework we develop our applications using Python within Jupyter notebooks.
Within the Pynq framework the programmable logic designs are called overlays and are treated as hardware libraries. While the creation of new overlays requires FPGA design experience there is a growing number of open source overlays available for developers to use (http://www.pynq.io/community.html)
There are a number of Pynq Images available for Xilinx development boards.
However, sometimes we want a Pynq image for a different or custom boards lets look at how we can create the Pynq Image for the Digilent Cora Z7010 board.Creating the Build Environment
The first thing we need to do is create a virtual machine, configured as following
- Ubuntu 16.04.
- 4 Processor Cores
- At least 8 G Byte of memory
- At least 300 G Bytes of hard disk space
- Configure the machine for passwordless sudo operation
Once the virtual machine is up and running the next thing we need to do is install the applications required to build Pynq.What Tools Do We Need?
To create a Pynq image we need the following tools installed on a Linux Virtual Machine
- Vivado 2018.2
- SDK 2018.2
- PetaLinux 2018.2
We also need to clone the Pynq repository from the Xilinx GitHub, with the following command.
git clone https://github.com/Xilinx/Pynq.git
Once the Pynq repository has cloned, you will be able to see a Pynq directory which contains a number of folders.
- Boards - Existing board specifications, Juypter Notebook and base overlays
- Doc - Documentation source
- Pynq - Python and associated support files
- SDBuild - Contains all scripts and resources to build Pynq image
To correctly set up our build environment the next step is to run the set environment script (setup_host.sh) in the directory
Once this script is completed the sensible thing to do a this point is to ensure we can rebuild for an existing board.
In this case I decided to rebuild the Pynq Z1 Image, to do this I changed directory to the SDBuild directory and ran the command
This starts the image creation process
The build process may take a while (Check the number of processors allocated to your Virtual Machine if very slow). However, once completed you will notice a output directory under the SDBuild directory.
Within this you will find the Pynq-Z1 image
Now we know we can recreate a Pynq image can develop our custom image.Building the Base Overlay
One of the first things we need for a Pynq build is a base overlay. For the Cora board we will use the Pynq Z1 image as a starting point. Of course for the Cora board the device is smaller so we need to make some modifications.
Open Vivado (2018.2) and source the following scripts, in the Vivado TCL window. You can find them within the directory
source build_base_ip.tcl Source base.tcl
The first command will generate the necessary IP, while the second will recreate the design in a Vivado project.
Now all we need to do is target the board to a Cora board. The easiest way to do this is change project device.
Rather helpfully a lot of the IO are on the same pins this includes the
- Pmod A
- Pmod B
- Tri-coloured LEDs
- Switches (push buttons on the Cora)
- I2C interface
- SPI Interface
However as we have fewer resources available we need to remove several of the functions.
I want to continue to be able to use the Pmod Interfaces, the final base platform is as below.
I then build the image in Vivado to ensure the design fitted in the design
The purpose of this step is to ensure the new base platform will fit within the Zynq 7010 device and to allow the regeneration of the base.tcl which we will need for the board definition.Creating a New Board
The final step before generating the image is to create a new board under the directory
Creating a new board requires the creation of a new directory named for the target board, in this case cora.
Within this directory we also need to create several directories and a board specification.
The board specification is a text file and contains the following information
The directories are
- base - this contains the base overlay and associated design information
- notebooks - this contains juypter notebooks
- petalinux_bsp - the linux BSP
I used the Pynq Z1 as a template for each of the directories updating the tcl, xdc and python files as necessary for the Cora board and the smaller 7010 device.
I also generated the bit file for the base design using the make script in the base directory.
When all this was completed I was able to start the Pynq build this time using the command from within the SDBuild directory
Again this takes a while to run however the result will be the same as before
I then created a SD Image the Cora board allowing me to test the image.Testing on Hardware
The first thing to monitor in the boot was the terminal output, this allowed me to ensure the boot up of the Pynq was correct.
Once the Cora had booted the Pynq image, the next step was to check the Cora was connected to my network such that I could access the Jupyter notebooks.
The final stage is to test the Jupyter notebooks. Open a browser, on a computer on the same network as the Pynq and enter the web address pynq:9090
This will bring you to the log in screen, the password is xilinx
Once logged in you will see a notebook and directories
Once we click on a notebook it will start running, we can see running notebooks by clicking on the running option.
We can also open terminal windows in the Jupyter environment if required
It looks like out Pynq environment is up and running on the Cora board, we can now start developing solutions and overlays as necessary.
See previous projects here.
Additional Information on Xilinx FPGA / SoC Development can be found weekly on MicroZed Chronicles.